1. Field of the Invention
The invention relates to a method and a circuit arrangement for testing electrical modules. A preferred, but not exclusive, field of application for the invention is in electronic modules that are formed as integrated circuits on a semiconductor chip, in particular data memories. Thus, the invention relates, in a particular embodiment, to a data memory circuit specifically designed for an application of the test method according to the invention.
2. Description of the Related Art
Electrical modules are generally tested by a test pattern of input signals being applied to the modules as “test specimens” and output signals generated as a response to said input signals being compared with prescribed “desired” responses. The comparison results are then evaluated for the purpose of displaying the test assessment. If the discrepancies between the “actual” responses that appear and the assigned desired responses all lie within a selected tolerance range, the test is deemed to have been “passed” (test assessment “good”); otherwise, the test is deemed to have been “failed” (test assessment “poor” or “defective”). If desired, the comparison results can also be individually evaluated and logged, even quantitatively in each case, on the basis of the log, to perform a more accurate analysis of the behavior of the test specimen.
Tests of the type described are indispensable to a module manufacturer, in particular as final testing of the completed modules prior to the delivery thereof. Commercial test devices (referred to as “testers” for short) are usually used, which are programmable, to provide the respective desired responses for selected test patterns, to carry out the comparison of the actual responses with the desired responses and to predefine the criteria for the test assessments. Such testers are relatively complicated devices, and all the more expensive, the faster they operate. In the case of modules to be tested, such as memory modules, which are intended to operate at very high speeds (i.e., with very fast signal sequences) in their useful mode, the testers must also be correspondingly fast, of course, to carry out the test realistically. The clock frequencies for the useful mode of present-day memory modules are a few hundred MHz. Testers capable of precisely testing modules with such high frequencies currently cost several million euro or US dollars.
Since a tester can only test a small number of modules in parallel on account of limited resources, the supply from mass fabrication of electrical modules can currently be handled only if a plurality of testers are available simultaneously. This applies both to the case of a large supply from a series of identical modules, the multiplicity of testers operating with identical programming, and to the case where different series of modules are manufactured in parallel, each series demanding its own test program. Consequently, this gives rise to relatively high capital expenditure which a module manufacturer has to spend on test devices, relative to the number of modules to be tested.
Therefore, there is a need to reduce the equipment outlay for the testing of series of electrical modules without reducing the accuracy and reliability of the tests.